Santosh Kumar, Director & Principal Analyst, Packaging, Assembly, Substrates & Semiconductor Manufacturing – Yole | Topic : Advanced Packaging: A Game Changer for Semiconductor Innovation
Semiconductor industry is at a turning point, the slowdown in CMOS scaling and escalated costs has prompted the industry to rely on IC packaging industry to extend the benefits of more-than-More era. Advanced packaging has entered its most successful era boosted by need for better integration, the slowdown of Moore’s law and, beyond that, the megatrends, transportation, 5G, consumer, memory & computing, IoT (& IIoT) and AI & HPC. In the era of a slowing Moore’s Law, advanced packaging has emerged as the savior of future semiconductor development. In this digital new age, advanced nodes do not bring the desired cost benefit anymore and R&D investments in new lithography solutions and devices below 10nm nodes are rising substantially. Hence, advanced packaging represents an opportunity to increase product value (higher performance at lower cost) offering advantages down both the scaling and functional roadmaps. Last couple of years semiconductor industry witnessed high double-digit growth and in 2019, we are expecting a slowdown (negative YoY growth). However, advanced packaging is expected to maintain the growth momentum in 2019 with ~ 6% YoY growth. The market today is dominated by large IDMs, such as Intel and Samsung, top 4 global OSATs and foundry with packaging house – TSMC, which jointly accounted for > 60% of the total advanced packaging revenue. These leaders are working on numerous innovative advanced packaging platforms such as flip-chip BGA, Fan-Out packaging, 3D TSV and more… to answer to the market needs. Each platform has a lot of momentum but has different potential and different characteristics. Packaging is now becoming an integral part of the system where assembly and test at 50um bump pitch and choice of substrates with multiple RDL layers with less than 1um L/S is as important as ever. Fan-Out continues to eat market share from the biggest advanced packaging platform, Flip Chip. Other advanced lead frame (e.g. fcQFN) and alternative redistribution technologies (e.g. MIS) have the potential to compete with advanced packaging and gain market share in the lower ends. Two advanced packaging roadmaps are foreseen – scaling (going to sub10 nm nodes) and functional (staying above 20nm nodes). Both roadmaps hold more multi-die heterogeneous integration (SiP) and higher levels of package customization in the future.
3 competitive areas are present and will continue to develop – PCB vs. substrate, substrate vs. Fan-Out, Fan-Out vs. 2.5D/3D. Primary innovation in advanced packaging: decreasing Cu pillar pitch, RDL/substrate development for L/S <10 um (thin film RDL, SAP, Cu damascene RDL and hybrids thereof), further TSV integration (2.5D/3D and MEMS/CIS). Foundries joined, PCB/Substrate suppliers and EMS also joining (advanced) package manufacturing. Intel remains biggest packaging house with TSMC in TOP 10 packaging houses and rising. How difficult is it for OSATs to challenge TSMC high-end domain? This presentation will describe the market dynamics and explain the different solutions and challenges that the industry will have to face.